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Search Results
| Name | Grades | Rating | |||
|---|---|---|---|---|---|
Not teaching in Spring 2026 | |||||
EEDG 6331 (Overall) | |||||
EEDG 6331 Benjamin Carrion Schaefer | |||||
Search Results
| Name | Grades | Rating | |||
|---|---|---|---|---|---|
Not teaching in Spring 2026 | |||||
EEDG 6331 (Overall) | |||||
EEDG 6331 Benjamin Carrion Schaefer | |||||
High-Level Synthesis: Design and Verification
EEDG 6331
Erik Jonsson School of Engineering and Computer Science
Facilitate the design of dedicated hardware using higher levels of abstraction (ANSI-C, C++ or SystemC) instead of hardware description languages like Verilog or VHDL. Theory of HLS process is comprehensively studied including: technology independent optimizations, resource allocation, scheduling, and binding stages. Students will design different types of hardware accelerators using HLS and learn how to design and verify complete hardware systems using only C. Course projects may include, but are not limited to: Building an automated HLS design space explorer, design of neural networks and building complete systems in C. Commercially available EDA tools will be used during the course. 3 credit hours.
Prerequisite: EE 3320 or equivalent, C/C++.
Offering Frequency: Each year
This professor/course combination hasn't been taught in the semesters you selected. To see more grade data, try changing your filters.
Grades: 0
Median GPA: None
Mean GPA: None
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High-Level Synthesis: Design and Verification
EEDG 6331
Erik Jonsson School of Engineering and Computer Science
Facilitate the design of dedicated hardware using higher levels of abstraction (ANSI-C, C++ or SystemC) instead of hardware description languages like Verilog or VHDL. Theory of HLS process is comprehensively studied including: technology independent optimizations, resource allocation, scheduling, and binding stages. Students will design different types of hardware accelerators using HLS and learn how to design and verify complete hardware systems using only C. Course projects may include, but are not limited to: Building an automated HLS design space explorer, design of neural networks and building complete systems in C. Commercially available EDA tools will be used during the course. 3 credit hours.
Prerequisite: EE 3320 or equivalent, C/C++.
Offering Frequency: Each year
This professor/course combination hasn't been taught in the semesters you selected. To see more grade data, try changing your filters.
Grades: 0
Median GPA: None
Mean GPA: None
Click a checkbox to add something to compare.