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5.0
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Difficulty
1,000
Ratings given
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Would take again
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EEDG 6301 William Swartz | |||||
A | |||||
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EEDG 6301 William Swartz | |||||
A | |||||
Grades: 1,928
Median GPA: A
Mean GPA: 3.510
3.8
Professor rating
2.8
Difficulty
34
Ratings given
64%
Would take again
Advanced Digital Logic
EEDG 6301
Erik Jonsson School of Engineering and Computer Science
Modern design techniques for digital logic. Logic synthesis and design methodology. Link between front-end and back-end design flows. Field programmable gate arrays and reconfigurable digital systems. Introduction to testing, simulation, fault diagnosis and design for testability. 3 credit hours.
Prerequisites: EE 3320 or equivalent and background in VHDL/Verilog.
Offering Frequency: Every two years
Grades: 311
Median GPA: A
Mean GPA: 3.721
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Grades: 1,928
Median GPA: A
Mean GPA: 3.510
3.8
Professor rating
2.8
Difficulty
34
Ratings given
64%
Would take again
Advanced Digital Logic
EEDG 6301
Erik Jonsson School of Engineering and Computer Science
Modern design techniques for digital logic. Logic synthesis and design methodology. Link between front-end and back-end design flows. Field programmable gate arrays and reconfigurable digital systems. Introduction to testing, simulation, fault diagnosis and design for testability. 3 credit hours.
Prerequisites: EE 3320 or equivalent and background in VHDL/Verilog.
Offering Frequency: Every two years
Grades: 311
Median GPA: A
Mean GPA: 3.721
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